1. Technical Field
The present invention relates to a semiconductor apparatus, and more particularly, to a semiconductor apparatus including a plurality of stacked semiconductor chips and a method of fabricating is the same.
2. Related Art
In general, with the high integration of a semiconductor product, there has been proposed a semiconductor apparatus having a structure in which a plurality of semiconductor chips are three-dimensionally stacked.
According to the semiconductor apparatus having the stack structure, since the semiconductor chips are stacked through a simple process, it is possible to improve the performance of the semiconductor apparatus, reduce fabrication cost, and facilitate mass production. However, as the number of semiconductor chips stacked is increased and the size is increased, interconnection space for electrical connections in the semiconductor apparatus is not sufficient.
In this regard, as an example of a stack package, a structure using a through-silicon via has been proposed.
In a semiconductor apparatus using the through-silicon via, through-silicon vias are formed in a plurality of semiconductor chips, and the semiconductor chips are physically and electrically stack-connected using the through-silicon vias.
In the general semiconductor apparatus using the through-silicon via, the semiconductor chips may be connected to one another as follows.
FIG. 1 is a diagram illustrating a part of a general semiconductor apparatus using a through-silicon via.
Referring to FIG. 1, the general semiconductor apparatus is using a through-silicon via includes a first semiconductor chip 110 in which a through-silicon via 111 and a first bump 113 have been formed, a second semiconductor chip 130 in which a through-silicon via 131 and a second bump 133 have been formed, and a connection unit 120 formed of a conductive material, such as a solder ball 121, for electrically connecting the first semiconductor chip 110 to the second semiconductor chip 130.
In the general semiconductor apparatus using the through-silicon via, the through-silicon via 111 of the first semiconductor chip 110, the first bump 113, the solder ball 121, and the second bump 133 are connected to one another. Reference numerals 112, 123 (not mentioned), and 132 denote insulation layers.
However, in the general semiconductor apparatus using the through-silicon via, a bonding defect may occur in a bonding surface between a bump 122 of the connection unit 120 and the through-silicon via 131 of the second semiconductor chip 130 due to stresses (for example, temperature or pressure) generated in a semiconductor chip stack process.